Field of the Invention
This invention relates generally to the field of computer processors. More particularly, the invention relates to an apparatus and method for adaptive pixel hashing in a processor such as a graphics processor.
Description of the Related Art
Today's Graphics-Processing-Unit (GPU) is a combination of multithreaded parallel processors that do extremely well not only on graphics but also on computing applications. Theoretically, the GPU performance is a product of two factors: the number of floating-point units (FPUs) and the inherent parallelism present in the application. Major advancements in semiconductor process technology (e.g., the continued miniaturization of CMOS devices) has produced faster and smaller transistors, enabling a massive number of FPUs in a single GPU. Further, this large number of FPUs has provided the software programmer with a substrate to rapidly solve complex problems that have considerable parallelism. These trends have significantly increased GPU performance, enabling leaps in software functionality and making it a ubiquitous commodity.
Unfortunately, there are various factors that can contribute to less than optimal performance of parallel machines like GPUs. One such factor is load Imbalance, i.e., not all of the compute nodes are busy doing the useful work and some are idle. Another factor relates to inefficiencies due to improper use of data locality—i.e., either compute nodes or compute clusters cannot contain much of the data needed by executing tasks, resulting in communication overhead, latency increases, and therefore longer execution times. Both of the above issues result from the fact that tasks are scheduled inefficiently on current implementations. Consequently, there is a significant decrease in the performance on current systems due to contention.